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Dual Core or multiprocessor AMD Opteron processors may encounter Time Stamp Counter (TSC) drift in certain conditions when time precision is important
 
Whether the system is affected by this issue depends on the specific ProLiant server generation, the number and type of AMD Opteron processors installed, the operating system, and whether AMD’s PowerNow! feature is being utilized.
 
This condition affects operations such as network communications and performance monitoring tasks that are sensitive to system time. For example, Microsoft Active Directory domain controllers can report an Unexpected Network Error (Event ID 1054).
Event Description: Windows cannot obtain the domain controller name for your computer network. (An unexpected network error occurred ) . Group Policy processing aborted.

In addition, a negative PING time may be returned after issuing the PING command. The negative PING time occurs because of a Time Stamp Counter drift occurring on AMD Opteron platforms which include more than one processor core.

You may also see that the performance monitor shows you wrong values.

Cause
Many operating systems use the TSC as a timekeeping source. Each processor core (whether it is a single-core processor or dual-core processor) includes a TSC. When the TSC for different processor cores are not synchronized, the above symptoms and behaviors can occur if the operating system is using the TSC as a timekeeping source

Resolution
Edit the BOOT.ini file and add the parameter "/usepmtimer", then reboot the server. Adding the "/usepmtimer" parameter to the BOOT.INI file configures the Windows operating system to use the PM_TIMER, rather than the Time Stamp Counter.
 
Note: When installing the latest AMD PowerNow! Technology driver from AMD, the BOOT.INI file will automatically be updated with the “/usepmtimer” parameter. While the driver itself does not resolve this issue, the installation process will make the necessary changes to the BOOT.INI file to prevent the issue from occurring.

Unless you are running SP2 for W2K3 (where we use the PM timer for MP APIC ACPI HALs by default now), you must force the use of the PM timer on AMD machines via the /USEPMTIMER switch. The decision to use the PM timer versus the TSC is actually a check done on boot to query the BIOS, and determine whether or not it will properly support the PM timer functions – this check is not 100% accurate on AMD chipsets, and that is why forcing /USEPMTIMER is required. This section of code was rewritten for W2K3 SP2, and you should see the proper performance monitor data on AMD chipsets with SP2 installed without the use of the /USEPMTIMER switch.

The document from AMD in the below link also explains the above problem

http://developer.amd.com/Assets/TSC_Dual-Core_Utility.pdf 

http://developer.amd.com/Pages/1214200692.aspx